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Audio Systems - Xilinx
https://www.xilinx.com/applications/broadcast/audio-systems.html
Xilinx FPGAs are unrivalled in providing the digital signal processing (DSP) performance required in audio processing, interfacing, compression, embedding and conversion. The inherent parallelism of FPGA architectures means that many channels of audio can be processed together using very efficient resources.
Digital Audio Reference Designs - Xilinx
https://www.xilinx.com/publications/prod_mktg/DigitalAudio_Reference_Designs.pdf
on the sources and destinations of the audio streams. source material recorded with one sample rate often must be converted to another sample rate for processing using asynchronous sample rate conversion (asRc). Xilinx provides digital audio reference designs with the unrivalled digital signal processing (dsp) performance
DSP - Xilinx
https://www.xilinx.com/products/technology/dsp.html
DSP Slice Architecture. The UltraScale™ DSP48E2 slice is the 5 th generation of DSP slices in Xilinx architectures.. This dedicated DSP processing block is implemented in full custom silicon that delivers industry leading power/performance allowing efficient implementations of popular DSP functions, such as a multiply-accumulator (MACC), multiply-adder (MADD) or complex …
DSP - Xilinx
https://china.xilinx.com/products/technology/dsp.html
Xilinx FPGA 和 SoC 是高性能或多通道数字信号处理 (DSP) 应用的理想选择，这些应用可充分利用硬件的并行性。 Xilinx FPGA 和 SoC 将该处理带宽与综合解决方案相结合，包含面向硬件设计人员、软件开发人员以及系统架构师的易用性设计工具。
Audio I2S - Xilinx
https://www.xilinx.com/products/intellectual-property/audio-i2s.html
The Xilinx® LogiCORE™ IP I2S Transmitter and Receiver cores are soft IP cores in Xilinx Vivado design suite which make it easy to implement Inter-IC-Sound (I2S) interface used to connect audio devices for transmitting and receiving PCM audio.
7 Series DSP48E1 Slice - Xilinx
https://www.xilinx.com/support/documentation/user_guides/ug479_7Series_DSP48E1.pdf
Virtex-6 family DSP designs migrate directly to the DSP resources of the 7 series. Migration of designs with cascaded DSP slices should co nsider the number of DSP slices per column. Spartan-6 family DSP designs can be converted to the 7 series, but designers should examine how to take advantage of the grea ter capability of th e DSP48E1 slice.
UltraScale Architecture DSP Slice User Guide - Xilinx
https://www.xilinx.com/support/documentation/user_guides/ug579-ultrascale-dsp.pdf
The DSP slice in the UltraScale architecture is defined using the DSP48E2 primitive and the slice is referred to as either DSP or DSP48E2 in the Xilinx tools. The basic functionality of the DSP48E2 slice is shown in Figure 1-1. For complete details, refer to Chapter 2, DSP48E2 Functionality. Send Feedback UltraScale Architecture DSP48E2 Slice 8
Audio Formatter - Xilinx
https://www.xilinx.com/products/intellectual-property/audio-formatter.html
The Xilinx® LogiCORE™ IP Audio Formatter (Audio DMA) core is a soft Xilinx IP core for use with the Xilinx Vivado® Design Suite. The Audio formatter provides high-bandwidth direct memory access between memory and AXI4-Stream target peripherals. Initialization, status, and management registers are accessed through an AXI4-Lite slave interface.
DSP48E1 time multiplexing and inference - support.xilinx.com
https://support.xilinx.com/s/question/0D52E00006hpXQy/dsp48e1-time-multiplexing-and-inference?language=en_US
The remaining 2 calculations for each DSP are dependent on each other however, so I believe that is the limit. It seems like the DSP48 Macro IP is quite powerful and I think I prefer it to trying to get the Xilinx synthesis tools to infer the DSP48. This is being used on up to 80 audio streams running at up to 192 KHz.
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