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Audio I2S - Xilinx
https://www.xilinx.com/products/intellectual-property/audio-i2s.html
The Xilinx® LogiCORE™ IP I2S Transmitter and Receiver cores are soft IP cores in Xilinx Vivado design suite which make it easy to implement Inter-IC-Sound (I2S) interface used to connect audio devices for transmitting and receiving PCM audio.
Audio Formatter - Xilinx
https://www.xilinx.com/products/intellectual-property/audio-formatter.html
The Xilinx® LogiCORE™ IP Audio Formatter (Audio DMA) core is a soft Xilinx IP core for use with the Xilinx Vivado® Design Suite. The Audio formatter provides high-bandwidth direct memory access between memory and AXI4-Stream target peripherals. Initialization, status, and management registers are accessed through an AXI4-Lite slave interface.
Audio Formatter - Xilinx
https://www.xilinx.com/support/documentation/ip_documentation/audio_formatter/v1_0/pg330-audio-formatter.pdf
The Xilinx ® LogiCORE™ IP Audio Formatter core is a soft Xilinx IP core for use with the Vivado ® Design Suite. The Audio Formatter provides high-bandwidth direct memory access between memory and AXI4-Stream target peripherals supporting audio data. F e a t u r e s • Supports 2, 4, 6, or 8 audio channels
UHD SDI Audio v2.0 PG309 (v2.0) December 1, 2021 - …
https://www.xilinx.com/support/documentation/ip_documentation/v_uhdsdi_audio/v2_0/pg309-v-uhdsdi-audio.pdf
The Xilinx ® UHD SDI Audio core is configurable as an audio embedder or an audio extractor. When configured as an audio embedder, the core can embed of up to 32 channels of AES3 audio data over an AXI4-Stream audio interface onto an SDI stream. Similarly, when configured as an
UHD SDI Audio v1 - Xilinx
https://www.xilinx.com/support/documentation/ip_documentation/v_uhdsdi_audio/v1_0/pg309-v-uhdsdi-audio.pdf
The Xilinx® UHD SDI Audio IP core is configurable as an Audio Embedder or an Audio Extractor. The UHD SDI Audio core is designed in accordance with the SMPTE ST 272 for SD-SDI and SMPTE ST 299-1 for HD/3G/6G/12G-SDI. The SDI Audio Embedder consists of …
Xilinx ALSA Audio I2S driver - Xilinx Wiki - Confluence
https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841805/Audio+I2S
The Xilinx® LogiCORE™ IP I2S Transmitter and Receiver cores are soft Xilinx IP core for use with the Xilinx Vivado® Design Suite. These IPs provide easy way of sending/receiving PCM audio over I2S interface and IPs provide an easy way to interface I2S based audio DAC/ADC. These IPs requires minimal register programming.
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